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Sensors (Basel, Switzerland) Mar 2018The Gaofen-3 (GF-3) data processor was developed as a workstation-based GF-3 synthetic aperture radar (SAR) data processing system. The processor consists of two vital...
The Gaofen-3 (GF-3) data processor was developed as a workstation-based GF-3 synthetic aperture radar (SAR) data processing system. The processor consists of two vital subsystems of the GF-3 ground segment, which are referred to as data ingesting subsystem (DIS) and product generation subsystem (PGS). The primary purpose of DIS is to record and catalogue GF-3 raw data with a transferring format, and PGS is to produce slant range or geocoded imagery from the signal data. This paper presents a brief introduction of the GF-3 data processor, including descriptions of the system architecture, the processing algorithms and its output format.
PubMed: 29534464
DOI: 10.3390/s18030835 -
The Journal of International Advanced... Nov 2023RONDO 2 is a lightweight, compact, wirelessly charged, and fully integrated single-unit speech processor. Single-unit processors provide an effective and convenient...
BACKGROUND
RONDO 2 is a lightweight, compact, wirelessly charged, and fully integrated single-unit speech processor. Single-unit processors provide an effective and convenient alternative to behind-the-ear processors for adults. Therefore, the aim of this study was to investigate if RONDO 2 is suitable for and did not compromise the hearing performance of young children in everyday life.
METHODS
Thirteen children aged -lt;4 years were fitted with the RONDO 2 speech processor at the first activation of the cochlear implant. They were evaluated with the LittlEARS® Auditory Questionnaire, LittlEARS® Early Speech Production Questionnaire, and the Speech, Spatial, and Qualities of Hearing Scale 12 pre-implantation. In addition to these measures, they were evaluated with the Audio Processor Satisfaction Questionnaire post-implantation. Duration of daily use and troubleshooting data were acquired. Evaluation occurred at 4 time points: before implantation and 1, 3, and 12 months post-initial activation.
RESULTS
Ten out of 13 children continued using RONDO 2 after the study. Twelve months after implantation, they used it on average 11.6 hours per day and had an average Audio Processor Satisfaction Questionnaire score of 9.1 out of 10. Average hearing performance scores continuously improved throughout the follow-up period across measures. Twelve months after implantation, the mean scores were 30.1 out of 35 for the LittlEARS® Auditory Questionnaire, 19.9 out of 27 for the LittlEARS® Early Speech Production Questionnaire, and 7.4 out of 10 for the Speech, Spatial, and Qualities of Hearing Scale 12.
CONCLUSION
Participants demonstrated high levels of satisfaction and good hearing performance with RONDO 2, which indicates that this single-unit processor could be a viable and comfortable alternative to behind-the-ear processors in young children, although larger controlled experiments are warranted.
Topics: Adult; Child; Humans; Child, Preschool; Cochlear Implants; Cochlear Implantation; Hearing; Speech Perception; Hearing Tests
PubMed: 38088315
DOI: 10.5152/iao.2023.22979 -
Sensors (Basel, Switzerland) Jan 2023Synthetic aperture radar (SAR), which can generate images of regions or objects, is an important research area of radar. The chirp scaling algorithm (CSA) is a...
Synthetic aperture radar (SAR), which can generate images of regions or objects, is an important research area of radar. The chirp scaling algorithm (CSA) is a representative SAR imaging algorithm. The CSA has a simple structure comprising phase compensation and fast Fourier transform (FFT) operations by replacing interpolation for range cell migration correction (RCMC) with phase compensation. However, real-time processing still requires many computations and a long execution time. Therefore, it is necessary to develop a hardware accelerator to improve the speed of algorithm processing. In addition, the demand for a small SAR system that can be mounted on a small aircraft or drone and that satisfies the constraints of area and power consumption is increasing. In this study, we proposed a CSA-based SAR processor that supports FFT and phase compensation operations and presents field-programmable gate array (FPGA)-based implementation results. We also proposed a modified CSA flow that simplifies the traditional CSA flow by changing the order in which the transpose operation occurs. Therefore, the proposed CSA-based SAR processor was designed to be suitable for modified CSA flow. We designed the multiplier for FFT to be shared for phase compensation, thereby achieving area efficiency and simplifying the data flow. The proposed CSA-based SAR processor was implemented on a Xilinx UltraScale+ MPSoC FPGA device and designed using Verilog-HDL. After comparing the execution times of the proposed SAR processor and the ARM cortex-A53 microprocessor, we observed a 136.2-fold increase in speed for the 4096 × 4096-pixel image.
Topics: Radar; Aircraft; Algorithms; Cell Movement; Cerebral Cortex
PubMed: 36679756
DOI: 10.3390/s23020959 -
IScience Jan 2022Biological visual system can efficiently handle optical information within the retina and visual cortex of the brain, which suggests an alternative approach for the... (Review)
Review
Biological visual system can efficiently handle optical information within the retina and visual cortex of the brain, which suggests an alternative approach for the upgrading of the current low-intelligence, large energy consumption, and complex circuitry of the artificial vision system for high-performance edge computing applications. In recent years, retinomorphic machine vision based on the integration of optoelectronic image sensors and processors has been regarded as a promising candidate to improve this phenomenon. This novel intelligent machine vision technology can perform information preprocessing near or even within the sensor in the front end, thereby reducing the transmission of redundant raw data and improving the efficiency of the back-end processor for high-level computing tasks. In this contribution, we try to present a comprehensive review on the recent progress achieved in this emergent field.
PubMed: 35072015
DOI: 10.1016/j.isci.2021.103729 -
Biosensors Apr 2022Correlation has a variety of applications that require signal processing. However, it is computationally intensive, and software correlators require high-performance...
Correlation has a variety of applications that require signal processing. However, it is computationally intensive, and software correlators require high-performance processors for real-time data analysis. This is a challenge for embedded devices because of the limitation of computing resources. Hardware correlators that use Field Programmable Gate Array (FPGA) technology can significantly boost computational power and bridge the gap between the need for high-performance computing and the limited processing power available in embedded devices. This paper presents a detailed FPGA-based correlator design at the register level along with the open-source Very High-Speed Integrated Circuit Hardware Description Language (VHDL) code. It includes base modules for linear and multi-tau correlators of varying sizes. Every module implements a simple and unified data interface for easy integration with standard and publicly available FPGA modules. Eighty-lag linear and multi-tau correlators were built for validation of the design. Three input data sets-constant signal, pulse signal, and sine signal-were used to test the accuracy of the correlators. The results from the FPGA correlators were compared against the outputs of equivalent software correlators and validated with the corresponding theoretical values. The FPGA correlators returned results identical to those from the software references for all tested data sets and were proven to be equivalent to their software counterparts. Their computation speed is at least 85,000 times faster than the software correlators running on a Xilinx MicroBlaze processor. The FPGA correlator can be easily implemented, especially on System on a Chip (SoC) integrated circuits that have processor cores and FPGA fabric. It is the ideal component for device-on-chip solutions in biosensing.
Topics: Computers; Signal Processing, Computer-Assisted; Software
PubMed: 35448296
DOI: 10.3390/bios12040236 -
Otology & Neurotology : Official... Dec 2023Bone-conduction hearing device (BCHD) uses natural sound transmission through bone and soft tissue, directly to the cochlea, via an external processor that captures and... (Comparative Study)
Comparative Study Observational Study
INTRODUCTION
Bone-conduction hearing device (BCHD) uses natural sound transmission through bone and soft tissue, directly to the cochlea, via an external processor that captures and processes sound, which is converted into mechanical vibrations. Key parameters, as maximum power output (MPO) and broader frequency range (FR), must be considered when indicating a BCHD because they can be decisive for speech recognition, especially under listening challenge conditions.
OBJECTIVES
Compare hearing performance and speech recognition in noise of two sound processors (SPs), with different features of MPO and FR, among BCHD users.
MATERIALS AND METHODS
This single-blinded, comparative, observational study evaluated 21 individuals Baha 4 system users with conductive or mixed hearing impairment. The free-field audiometry and speech recognition results were blindly collected under the following conditions: unaided, with Baha 5, and with Baha 6 Max SP.
RESULTS
In free-field audiometry, significant differences were observed between the SP at 0.25, 3, 4, 6, and 8 kHz, with Baha 6 Max outperforming Baha 5. The Baha 6 Max provided significantly better speech recognition than Baha 5 under all the speech in noise conditions evaluated. Separating the transcutaneous from the percutaneous users, Baha 6 Max Attract SP provided the best results and significantly lowered the free-field thresholds than Baha 5 Attract. The Baha 6 Max also significantly improved speech recognition in noise, among both Attract and Connect users.
CONCLUSION
The present study revealed that the greater MPO and broader FR of the Baha 6 Max device helped increase high-frequency gain and improved speech recognition in BCHD-experimented users.
Topics: Humans; Bone Conduction; Hearing; Hearing Aids; Hearing Loss, Conductive; Speech; Speech Perception
PubMed: 37917961
DOI: 10.1097/MAO.0000000000004043 -
Sensors (Basel, Switzerland) Sep 2019It is widely recognized that nanoscience and nanotechnology and their subfields, such as nanophotonics, nanoelectronics, and nanomechanics, have had a tremendous impact... (Review)
Review
It is widely recognized that nanoscience and nanotechnology and their subfields, such as nanophotonics, nanoelectronics, and nanomechanics, have had a tremendous impact on recent advances in sensing, imaging, and communication, with notable developments, including novel transistors and processor architectures. For example, in addition to being supremely fast, optical and photonic components and devices are capable of operating across multiple orders of magnitude length, power, and spectral scales, encompassing the range from macroscopic device sizes and kW energies to atomic domains and single-photon energies. The extreme versatility of the associated electromagnetic phenomena and applications, both classical and quantum, are therefore highly appealing to the rapidly evolving computing and communication realms, where innovations in both hardware and software are necessary to meet the growing speed and memory requirements. Development of all-optical components, photonic chips, interconnects, and processors will bring the speed of light, photon coherence properties, field confinement and enhancement, information-carrying capacity, and the broad spectrum of light into the high-performance computing, the internet of things, and industries related to cloud, fog, and recently edge computing. Conversely, owing to their extraordinary properties, 0D, 1D, and 2D materials are being explored as a physical basis for the next generation of logic components and processors. Carbon nanotubes, for example, have been recently used to create a new processor beyond proof of principle. These developments, in conjunction with neuromorphic and quantum computing, are envisioned to maintain the growth of computing power beyond the projected plateau for silicon technology. We survey the qualitative figures of merit of technologies of current interest for the next generation computing with an emphasis on edge computing.
PubMed: 31546907
DOI: 10.3390/s19184048 -
Optics Express Aug 2022In this paper, a broadband photonic beam processor is presented for the all-optical multifunction integrated receiver. By implementing echo signals with optical beam...
In this paper, a broadband photonic beam processor is presented for the all-optical multifunction integrated receiver. By implementing echo signals with optical beam multi-domain processing based on space-to-time mapping and time-to-frequency mapping, the non-mechanical control of expected beam pointing is enabled while the target within the beam can be imaged simultaneously. A proof-of-concept experiment with a 4-element phased array is performed in Ka band. The beam pointing is set to be 0° and 12.5°, where two-dimensional images of moving targets inside the beam region are obtained, respectively. The suppression ratio to the beam region outside is measured to be 26.8 dB. And the range and cross-range imaging resolution is 0.042 m × 0.051 m. A comparison with a cascade mode of single-function microwave photonic modules shows that the multifunction integrated photonic beam processor has reduced the system loss by 32.4 dB. The proposed beam processor enables multi-element broadband phased arrays with less complexity and power consumption.
PubMed: 36242128
DOI: 10.1364/OE.464769 -
Nature Jun 2023Quantum computing promises to offer substantial speed-ups over its classical counterpart for certain problems. However, the greatest impediment to realizing its full...
Quantum computing promises to offer substantial speed-ups over its classical counterpart for certain problems. However, the greatest impediment to realizing its full potential is noise that is inherent to these systems. The widely accepted solution to this challenge is the implementation of fault-tolerant quantum circuits, which is out of reach for current processors. Here we report experiments on a noisy 127-qubit processor and demonstrate the measurement of accurate expectation values for circuit volumes at a scale beyond brute-force classical computation. We argue that this represents evidence for the utility of quantum computing in a pre-fault-tolerant era. These experimental results are enabled by advances in the coherence and calibration of a superconducting processor at this scale and the ability to characterize and controllably manipulate noise across such a large device. We establish the accuracy of the measured expectation values by comparing them with the output of exactly verifiable circuits. In the regime of strong entanglement, the quantum computer provides correct results for which leading classical approximations such as pure-state-based 1D (matrix product states, MPS) and 2D (isometric tensor network states, isoTNS) tensor network methods break down. These experiments demonstrate a foundational tool for the realization of near-term quantum applications.
PubMed: 37316724
DOI: 10.1038/s41586-023-06096-3 -
Sensors (Basel, Switzerland) Jun 2022In principle, the recently proposed capacitive-coupling impedance spectroscopy (CIS) has the capability to acquire frequency spectra of complex electrical impedance...
In principle, the recently proposed capacitive-coupling impedance spectroscopy (CIS) has the capability to acquire frequency spectra of complex electrical impedance sequentially on a millisecond timescale. Even when the measured object with time-varying unknown resistance is capacitively coupled with the measurement electrodes with time-varying unknown capacitance , CIS can be measured. As a proof of concept, this study aimed to develop a prototype that implemented the novel algorithm of CIS and circuit parameter estimation to verify whether the frequency spectra and circuit parameters could be obtained in milliseconds and whether time-varying impedance could be measured. This study proposes a dedicated processor that was implemented as field-programmable gate arrays to perform CIS, estimate and , and their digital-to-analog conversions at a certain time, and to repeat them continually. The proposed processor executed the entire sequence in the order of milliseconds. Combined with a front-end nonsinusoidal oscillator and interfacing circuits, the processor estimated the fixed and fixed with reasonable accuracy. Additionally, the combined system with the processor succeeded in detecting a quick optical response in the resistance of the cadmium sulfide (CdS) photocell connected in series with a capacitor, and in reading out their resistance and capacitance independently as voltages in real-time.
PubMed: 35746187
DOI: 10.3390/s22124406